Home
Issues List
1 Aug 22, 2018
THE PERFORMANCE OF BITUMINOUS MIX USING POLYTHENE ADMIXTURE WITH FILLER AND REPLACING WITH FILLER AND REPLACING VARIOUS PERCENTAGE OF BITUMEN

Plastics are everywhere in today’s lifestyle and are growing rapidly throughout particularly in a developing country like India. As these are non-biodegradable there is a major problem posed to the society with regard to the management of these solid wastes. Low density polyethylene (LDPE) has been found to be a good modifier of bitumen. Even, the reclaimed polyethylene originally made of LDPE has been observed to modify bitumen. In the present study, an attempt has been made to use reclaimed polyethylene which has been obtained from plastic packets used in packaging of domestic goods....

Authors: Yadvendra kumhar, Manish dubey.

2 Aug 22, 2018
BITUMINOUS CONCRETE MIX DESIGN USING DIFFERENT PERCENTAGE OF WASTE POLYETHYLENE TO IMPROVE THE STRENGTH OF ROAD

Use of recycled waste materials in road pavements is nowadays considered not only as a positive option in terms of sustainability, but also, as an attractive option in means of providing enhanced performance in service. This is especially true in the case of recycled plastics. Thin plastic bags are mainly composed of low density Polyethylene (LDPE) and it’s commonly used for packaging, protecting and many other applications. However disposal of waste plastic bags (WPB) in large quantities constitutes an environmental problem, as they considered non-biodegradable materials. Hence, there is a real need to find useful applications for these growing quantities of wastes. In this research, Waste Plastic Bags (WPB) as one form of polymers is used to investigate the potential prospects to enhance asphalt mixture properties. Aims include studying the effect of adding different percentages of grinded WPB as an aggregate coat on the properties of asphalt mix comparing it with conventional mix properties besides identifying the optimum percent of WPB to be added in the hot mix asphalt....

Authors: Amritansh Sharma, Manish Dubey.

3 Aug 22, 2018
BEHAVIOR OF CONCRETE USING HYBRID FIBER (POLYPROPYLENE) WITH AND WITHOUT ADMIXTURE

Concrete is most widely used construction material in the world. Fiber reinforced concrete (FRC) is a concrete in which small and discontinuous fibers are dispersed uniformly. The fibers used in FRC may be of different materials like steel, carbon, glass, polypropylene etc. The addition of these fibers into concrete mass can dramatically increase the compressive strength, tensile strength, flexural strength and impact strength of concrete. The effect of addition of hybrid fibers on the mechanical properties of concrete mixture is studied in the present investigation. In The present study specimens incorporated fly ash and polypropylene fibers in the mix proportions is described as cement is replaced with fly ash (from 0%, 5%, 10 and 15%) and polypropylene is added 0.1% to 0.2 %. And length of fiber 40mm and 60mm is used.This study gives detail analysis of compressive strength and cost comparison between polypropylene and normal mix....

Authors: Mayank mishra, Vijay kumar punjabi.

4 Aug 22, 2018
Optimization Design Techniques for Reduce Power Consumption in CMOS Circuit for VLSI Design

Power dissipation becoming a limiting factor in VLSI circuits and systems. Due to relatively high complexity of VLSI systems used in various applications, the power dissipation in CMOS inverter, arises from it’s switching activity, which is mainly influenced by the supply voltage and effective capacitance. One of challenge with technology scaling is the rapid increase in subthreshold leakage power due to Vt reduction. Leakage power dissipation is a component of static power dissipation in CMOS circuits. It is caused by the presence of leakage currents in the MOS transistors. Leakage power can be reduce by Stack, Sleep and Sleepy keeper transistor techniques. Sleepy Keeper technique provided lesser static power dissipation and lesser static power delay product in comparison with the other techniques. The main advantage of using Sleepy Keeper technique is that it retains the logic state and also lowers the subthreshold leakage power dissipation. It has been shown previously that the stacking of two off transistors has significantly reduced sub-threshold leakage compared to a single off transistor. In stack transistor technique two half channel width transistors are connected in series to for one of the transistor in pull up and pull down networks with gates to increase the stack effect, it will increase the resistance between the supply and ground. Therefore, the leakage of the logic gate is reduced. A MOS transistor in the circuit is divided and stacked into two half width size transistors. When two half size stacked MOS transistors are turned off together, induce reverse bias between them results in the reduction of the sub threshold leakage power. However, increase in the number of transistors increases the overall propagation delay of the circuit. In this work we analyze the parametric estimation for MOSFET switching delay, leakage current reduction, power dissipation and variation of temperature effects due to the parasitic devices. One solution to the problem of ever-increasing leakage is to force a non-stack device to a stack of two devices without affecting the input load. The stacking of two off devices has significantly reduced sub-threshold leakage compared to a single off device. Logic gates after stack forcing will reduce leakage power, but incur a delay penalty which is improve in our work, similar to replacing a low- Vt device with a high- Vt device in a dual- Vt design. Due to stacking of devices, the drive current of a forced-stack gate will be lower resulting in increased delay. Here we can design a full adder logic circuit using stack transistors....

Authors: Devyani Mishra, Amzad Quazi.

Announcements

  • Calling Papers For Volume 8, Issue 2 Last Deadeline For Paper Submission 01-March-2018 Posted by Admin Posted by Admin.